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8. 4-to-1 Multiplexer by Module Instantiation

// ============================================================
// 2-to-1 Multiplexer
// ============================================================
module mux2to1 (
    input  d0, d1,   // data inputs
    input  sel,      // select input
    output y         // output
);
    assign y = sel ? d1 : d0;
endmodule

module mux4to1 (
    input  d0, d1, d2, d3,
    input  [1:0] sel,
    output y
);
    wire w1, w2;

    mux2to1 m1 ( .d0(d0), .d1(d1), .sel(sel[0]), .y(w1) );
    mux2to1 m2 ( .d0(d2), .d1(d3), .sel(sel[0]), .y(w2) );
    mux2to1 m3 ( .d0(w1), .d1(w2), .sel(sel[1]), .y(y)  );
endmodule

💡Remember

  • Structural design: build a larger function (mux4to1) from smaller blocks (mux2to1).
  • Named port mapping improves readability and avoids ordering mistakes.
  • Intermediate nets (w1, w2) carry the results of the first stage.
  • Two-stage selection: LSB sel[0] chooses within pairs; MSB sel[1] chooses between pairs.
  • Purely combinational; no always block required.