module jk_ff_enable (
input CLK,
input EN,
input J,
input K,
output reg Q
);
// Write your code here
always @(posedge CLK)
begin
if (EN)
begin
if (~J & ~K)
Q <= Q;
else if (~J & K)
Q <= 1'b0;
else if (J & ~K)
Q <= 1'b1;
else if (J&K)
Q <= ~Q;
end
end
endmodule