How do you plan to solve it?
module jk_ff_enable ( input CLK, input EN, input J, input K, output reg Q ); // Write your code here always @(posedge CLK && EN)begin if (J && K) Q<=~Q; else if (!J && K ) Q<=1'b0; else if (J && !K ) Q<=1'b1; else Q<=Q; end endmodule