23. LED Toggle on Rising Edge

Testbench Code

`timescale 1ns/1ps

module tb_led_toggle;
    // Input
    reg clk;

    // DUT output
    wire led;

    // Expected
    reg expected_led;

    // Mismatch
    wire mismatch = (led !== expected_led);

    // Counters
    integer TOTAL_TEST_CASES=0, TOTAL_PASSED_TEST_CASES=0, TOTAL_FAILED_TEST_CASES=0;

    // DUT
    led_toggle dut(.clk(clk), .led(led));

    // VCD dump
    initial begin
        $dumpfile("tb_led_toggle.vcd");
        $dumpvars(0,
            tb_led_toggle.clk,
            tb_led_toggle.led,
            tb_led_toggle.expected_led,
            tb_led_toggle.mismatch
        );
        $dumpon;
    end

    // Clock generation
    localparam T = 10;
    initial clk = 0;
    always #(T/2) clk = ~clk;

    // Init expected
    initial expected_led = 0;

    // Golden model: toggle on posedge
    always @(posedge clk) begin
        expected_led <= ~expected_led;
        check_and_log;
    end

    // Task to check DUT vs expected
    task check_and_log;
        begin
            TOTAL_TEST_CASES++;
            if (!mismatch) TOTAL_PASSED_TEST_CASES++; else TOTAL_FAILED_TEST_CASES++;
            $display("time=%0t clk=%b | led=%b exp=%b | mismatch=%0d",
                     $time, clk, led, expected_led, mismatch);
        end
    endtask

    // Run for 20 cycles
    initial begin
        #0 check_and_log;
        #(20*T);
        $display("-----------------------------------");
        $display("TOTAL_TEST_CASES=%0d", TOTAL_TEST_CASES);
        $display("TOTAL_PASSED_TEST_CASES=%0d", TOTAL_PASSED_TEST_CASES);
        $display("TOTAL_FAILED_TEST_CASES=%0d", TOTAL_FAILED_TEST_CASES);
        $display("ALL_TEST_CASES_PASSED=%s",
                 (TOTAL_FAILED_TEST_CASES==0) ? "true" : "false");
        $finish;
    end
endmodule