75. D Latch

How do you plan to solve it?

module d_latch (
    input  EN,
    input  D,
    output reg Q
);
   // Write your code here
   always@(*)begin
    if(EN)begin
        case(D)
          1'b1 : Q = D;
          1'b0 : Q = D;
        endcase
    end
    else 
       Q = Q;
   end
endmodule