75. D Latch

How do you plan to solve it?

module d_latch (
    input  EN,
    input  D,
    output reg Q
);
   // Write your code here
   always @(*) begin
    if (EN) begin
        if (D) begin
            Q<=1;
        end
        else begin
            Q<=0;
        end
    end
   end
endmodule