81. JK Flip-Flop

How do you plan to solve it?

module jk_ff (
    input  CLK,
    input  J,
    input  K,
    output reg Q
);

    always @(posedge CLK) begin
        if ((J | K)== 1'b0)         // HOLD
            Q <= Q;
        else if ((J | ~K)== 1'b0)   // RESET
            Q <= 1'b0;
        else if ((~J | K)== 1'b0)   // SET
            Q <= 1'b1;
        else                        // TOGGLE
            Q <= ~Q;
    end
endmodule