How do you plan to solve it?
module jk_ff ( input CLK, input J, input K, output reg Q ); // Write your code here always @(posedge CLK) begin case ({J,K}) 2'b00: begin Q<=Q; end 2'b01: begin Q<=0; end 2'b10: begin Q<=1; end 2'b11: begin Q<=~Q; end endcase end endmodule