81. JK Flip-Flop

How do you plan to solve it?

module jk_ff (
    input  CLK,
    input  J,
    input  K,
    output reg Q
);
always@(posedge CLK)

begin
    if(J==0 && K==0)
    Q<=Q;

    else if (J==0 && K==1)
    Q<=1'b0;

    else if(J==1 && K==0)
    Q<=1'b1;

    else
    Q<=~Q;
end



endmodule