How do you plan to solve it?
module vector_splitter ( input [7:0] in_vec, output [3:0] out1, output wire [1:0] out2, output wire out3, output wire out4 ); assign out1[3:0] = in_vec[7:4]; assign out2[1:0] = in_vec[3:2]; assign out3 = in_vec[1]; assign out4 = in_vec[0]; endmodule