84. T Flip-Flop with Asynchronous Preset and Reset

How do you plan to solve it?

module t_ff_async_pr (
    input  CLK,
    input  RST,
    input  PRE,
    input  T,
    output reg Q
);
    // Write your code here
    always @(posedge CLK or posedge RST or posedge PRE)begin
        if (RST)begin
            Q<=1'b0;
        end
        else if (~RST && PRE)begin
            Q<=1'b1;
        end
        else if (T == 1'b0) begin
            Q<=Q;
        end
        else if (T == 1'b1)begin
            Q<=~Q;
        end
    end


endmodule