84. T Flip-Flop with Asynchronous Preset and Reset

How do you plan to solve it?

module t_ff_async_pr (
    input  CLK,
    input  RST,
    input  PRE,
    input  T,
    output reg Q
);
    // Write your code here

always @(posedge CLK or posedge RST or posedge PRE) begin

    if(RST) begin
        Q=0;
    end

    else begin

        if(PRE) Q=1;

        else begin

            if(T==0) Q<=Q;

            else Q<=~Q;
            
        end
    end


end

endmodule