84. T Flip-Flop with Asynchronous Preset and Reset

module t_ff_async_pr (
    input  CLK,
    input  RST,
    input  PRE,
    input  T,
    output reg Q
);
    // Write your code here
    always @(posedge CLK or posedge RST or posedge PRE) begin
        if(RST) begin
            Q <= 0;
        end
        else if(PRE) begin
            Q <= 1;
        end
        else begin
            case({T})
                1'b0: begin
                    Q <= Q;
                end
                1'b1: begin
                    Q <= ~Q;
                end
            endcase
        end
    end
endmodule