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84. T Flip-Flop with Asynchronous Preset and Reset

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Solving Approach

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Code

module t_ff_async_pr (
    input  CLK,
    input  RST,
    input  PRE,
    input  T,
    output reg Q
);
    // Write your code here
    always @(posedge PRE, posedge RST, posedge CLK)begin 
    if(RST) Q<=0; 
    else if(PRE) Q<=1; 
    else begin 
    if(T)
    Q<=~Q;  
    end
    end 
endmodule

 

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