9. XOR Gate Using Basic Gates

How do you plan to solve it?

module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

module xor_gate (
    input  a, b,
    output y
);
    wire [3:0]w;
    not_gate not1(a,w[0]);
    not_gate not2(b,w[1]);
    and_gate and1(a,w[1],w[2]);
    and_gate and2(b,w[0],w[3]);
    assign y = w[2] ^ w[3];
endmodule