9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a|b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = !a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire not_a;
    wire not_b;
    wire and_a_notb;
    wire and_b_nota;

    // TODO: instantiate required gates
    not_gate not_gate_a (a,not_a);
    not_gate not_gate_b (b,not_b);

    and_gate and_a_not_b (a, not_b, and_a_notb);
    and_gate and_b_not_a (b, not_a, and_b_nota);

    or_gate xor_out (and_b_nota,and_a_notb,y);

endmodule