9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a|b;

endmodule

module not_gate(input a, output y);
    assign y= ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
     wire nota, notb;
    wire y0, y1;

    // NOT gates
    not_gate n1 (.a(a), .y(nota));
    not_gate n2 (.a(b), .y(notb));

    // AND gates
    and_gate a1 (.a(a),    .b(notb), .y(y0));
    and_gate a2 (.a(nota), .b(b),    .y(y1));

    // OR gate
    or_gate  o1 (.a(y0), .b(y1), .y(y));



endmodule