9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y=a|b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y=~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
wire c,d,e,f;
not_gate u1(a,c);
not_gate u2(b,d);
and_gate u3(a,d,e);
and_gate u4(b,c,f);
or_gate u5(e,f,y);
endmodule