9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);

    wire notA;
    wire notB;
    wire or1;
    wire or2;

    // TODO: instantiate required gates
    not_gate not1 (.a(a), .y(notA));
    not_gate not2 (.a(b), .y(notB));

    and_gate and1 (.a(a), .b(notB), .y(or1));
    and_gate and2 (.a(b), .b(notA), .y(or2));

    or_gate orMod (.a(or1), .b(or2), .y(y));

endmodule