9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
   assign y= a|b;

endmodule

module not_gate(input a, output y);
    assign y= ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
        wire nota,notb,a_a,a_b;
  
        not_gate n1(.a(a), .y(nota));
        not_gate n2(.a(b), .y(notb));

        and_gate a1(.a(a), .b(notb),  .y(a_a));
        and_gate a2(.a(nota), .b(b), .y(a_b));

        or_gate o1(.a(a_a), .b(a_b), .y(y));
     
endmodule