9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule


module xor_gate (
    input  a, b,
    output y
);
   wire w1, w2, w3, w4;
    not_gate d0 (.a(b), .y(w1));
    not_gate d1 (.a(a), .y(w2));
    and_gate d2 (.a(a), .b(w1), .y(w3));
    and_gate d3 (.a(w2), .b(b), .y(w4));
    or_gate d4 (.a(w3), .b(w4), .y(y));

endmodule