9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire a_n, b_n, a_and_b_n, b_and_a_n;

    // TODO: instantiate required gates
    not_gate not_a (a, a_n);
    not_gate not_b (b, b_n);

    and_gate and1   (a, b_n, a_and_b_n);
    and_gate and2   (b, a_n, b_and_a_n);

    or_gate  or_out (a_and_b_n, b_and_a_n, y);


endmodule