9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire to_and0, to_and1;
    wire or0, or1;

    not_gate not_toand1 (
        .a(a), .y(to_and1)
    );

    not_gate not_toand0 (
        .a(b), .y(to_and0)
    );

    and_gate and0 (
        .a(a), .b(to_and0), .y(or0)
    );

    and_gate and1 (
        .a(to_and1), .b(b), .y(or1)
    );

    or_gate orfinal (
        .a(or0), .b(or1), .y(y)
    );

endmodule