9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
  assign y = a|b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
wire j1,j2,j3,j4,j5;
not_gate n1(.a(a), .y(j1));
not_gate n2(.a(b), .y(j2));
and_gate a1(.a(a),.b(j2), .y(j3));
and_gate a2(.a(j1),.b(b), .y(j4));
or_gate o1(.a(j3),.b(j4), .y(y));


endmodule