9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire not_a;
    wire not_b;

    wire a1;
    wire a2;

    // TODO: instantiate required gates

    not_gate u0 (.a(a), .y(not_a));
    not_gate u1 (.a(b), .y(not_b));

    and_gate u2 (.a(a), .b(not_b), .y(a1));
    and_gate u3 (.a(not_a), .b(b), .y(a2));

    or_gate u4 (.a(a1), .b(a2), .y(y));

endmodule