9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y=a|b;
endmodule

module not_gate(input a, output y);
    assign y=~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire b1,a_1,a1,a2;
    not_gate n1(b,b1);
    not_gate n2(a,a_1);
    and_gate and1(a,b1,a1);
    and_gate and2(a_1,b,a2);
    or_gate or1(a1,a2,y);
endmodule