9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate_a(input a, output y);
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire ab, ba, w1, w2;
    // TODO: instantiate required gates
    not_gate_a n1(a, ab);
    not_gate_a n2(b, ba);
    and_gate n3(a, ba, w1);
    and_gate n4(b, ab, w2);
    or_gate n5(w1, w2, y);
endmodule