9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y=a|b;

endmodule

module not_gate(input a, output y);
    assign y=!a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    assign y = (a&!b)|(!a&b);

    wire an, bn, t1, t2;
not_gate u0(.a(a), .y(an));
not_gate u1(.a(b), .y(bn));
and_gate u2(.a(a),  .b(bn), .y(t1));
and_gate u3(.a(an), .b(b),  .y(t2));
or_gate  u4(.a(t1), .b(t2), .y(y));


endmodule