9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire or_in_1;
    wire or_in_2;

    // TODO: instantiate required gates
    and_gate and1 (.a(a), .b(~b), .y(or_in_1));
    and_gate and2 (.a(~a), .b(b), .y(or_in_2));
    or_gate or1(.a(or_in_1), .b(or_in_2), .y(y));
    //assign y = a^b;

endmodule