9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
   assign y = a |b;

endmodule

module not_gate(input a, output y);
   assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
 wire t1 , t2;
 and_gate ins1(.a(a) , .b(~b), .y(t1));
 and_gate ins2(.a(~a) , .b(b), .y(t2));
 or_gate  ins3 (.a(t1), .b(t2) , .y(y));


endmodule