9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire [4:0]w;

    not_gate inst1(a,w[0]);
    not_gate inst2(b,w[1]);

    and_gate inst3(a,w[1],w[2]);
    and_gate inst4(b,w[0],w[3]);

    or_gate inst5(w[2],w[3],y);


endmodule