9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y= ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
   wire a1,b1,t1,t2;
   not_gate n1 (.a(a), .y(a1));
   not_gate n2 (.a(b), .y(b1));

   and_gate ad1 (.a(a), .b(b1), .y(t1));
   and_gate ad2 (.a(a1), .b(b), .y(t2));

   or_gate o1 (.a(t1), .b(t2), .y(y));

endmodule