9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~ a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire [3:0] tmp;
    not_gate u1(a,tmp[0]);
    not_gate u2(b,tmp[1]);
    and_gate u3(a,tmp[1],tmp[2]);
    and_gate u4(b,tmp[0],tmp[3]);
    or_gate u5(tmp[2],tmp[3],y);
endmodule