9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a|b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y =  ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire w1,w2,bbar,abar;
    not_gate N1(a,abar);
    not_gate N2(b,bbar);
    and_gate A1(a,bbar,w1);
    and_gate A2(b,abar,w2);
    or_gate O1(w1,w2,y);

endmodule