9. XOR Gate Using Basic Gates

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~(a);

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire [3:0]w;
    // TODO: instantiate required gates
    not_gate notb(b, w[0]);
    not_gate nota(a, w[1]);

    and_gate and1(a, w[0], w[2]);
    and_gate and2(b, w[1], w[3]);

    or_gate or_res(w[2], w[3], y);

endmodule