9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    wire ainv, binv, y1, y2;

    
    not_gate notb (.a(b), .y(binv));
    not_gate nota (.a(a), .y(ainv));
    and_gate anda (.a(a), .b(binv), .y(y1));
    and_gate andb (.a(ainv), .b(b), .y(y2));
    or_gate orfin (.a(y1), .b(y2), .y(y));



endmodule