9. XOR Gate Using Basic Gates

How do you plan to solve it?

a simple XOR gate using AND, OR and NOT gate instantiations

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire w1, w2;
    wire a_n, b_n;
    // TODO: instantiate required gates
    not_gate inst1(a, a_n);
    not_gate inst2(b, b_n);
    and_gate inst3(a, b_n, w1);
    and_gate inst4(a_n, b, w2);
    or_gate inst5(w1, w2, y);


endmodule