9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y=a|b;


endmodule

module not_gate(input a, output y);
    assign y=~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
wire w1,w2;
and_gate aa(a,~b,w1);
and_gate aa1(~a,b,w2);
or_gate aa3(w1,w2,y);



endmodule