9. XOR Gate Using Basic Gates

How do you plan to solve it?

module and_gate(input in1,in2, output out); 
assign out = in1&in2; 
endmodule 
module not_gate(input in1,output out );
assign out = ~in1; 
endmodule 
module or_gate(input in1, in2, output out); 
assign out = in1|in2; 
endmodule 
module xor_gate(input a,b,output y);
wire t1,t2,t3,t4; 
not_gate not1 (.in1(a), .out(t1));
not_gate not2 (.in1(b), .out(t2));
and_gate and1 (.in1(a), .in2(t2), .out(t3));
and_gate and2 (.in1(b), .in2(t1), .out(t4));
or_gate or1(.in1(t3), .in2(t4), .out(y));
endmodule