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9. XOR Gate Using Basic Gates

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Solving Approach

used vign modules

 

 

 

Code

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a|b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);

    // TODO: declare intermediate wires
    wire a_bar;
    wire b_bar;
    wire a_bbar;
    wire b_abar;

    // TODO: instantiate required gates
    not_gate vig (a, a_bar);
    not_gate vign (b, b_bar);

    and_gate  vigne (a,b_bar,a_bbar);
    and_gate vignes (a_bar, b, b_abar);

    or_gate vignesh (a_bbar, b_abar, y);

endmodule

 

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