9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    assign y = ~a;
endmodule

module xor_gate (
    input  a, b,
    output y
);
    wire w1, w2;
    and_gate and1( .a(a), .b(~b), .y(w1));
    and_gate and2( .a(~a), .b(b), .y(w2));
    or_gate or1( .a(w1), .b(w2), .y(y));
endmodule