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9. XOR Gate Using Basic Gates

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Solving Approach

Doing module instantiations from basic gates.

 

 

Code

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire notb, nota, abbar, abarb;

    // TODO: instantiate required gates

    not_gate n1 (.a(a), .y(nota));
    not_gate n2 (.a(b), .y(notb));

    and_gate a1 (.a(a), .b(notb), .y(abbar));
    and_gate a2 (.a(nota), .b(b), .y(abarb));

    or_gate o1 (.a(abbar), .b(abarb), .y(y));

endmodule

 

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