9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y=a|b;

endmodule

module not_gate(input a, output y);
    assign y=~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
wire n1,n2,a1,a2;

not_gate g1(a,n1);
not_gate g2(b,n2);

and_gate g3(a,n2,a1);
and_gate g4(b,n1,a2);

or_gate g5(a1,a2,y);
endmodule