9. XOR Gate Using Basic Gates

How do you plan to solve it?

module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a | b;
endmodule

module not_gate(input a, output y);
    assign y = ~a;
endmodule

// ============================================================
// XOR Gate
// ============================================================

module xor_gate (
    input  a, b,
    output y
);
    wire w1, w2, w3, w4;

    not_gate m1 (.a(b), .y(w1));
    and_gate m2 (.a(a), .b(w1), .y(w3));

    not_gate m3 (.a(a), .y(w2));
    and_gate m4 (.a(w2), .b(b), .y(w4));

    or_gate  m5 (.a(w3), .b(w4), .y(y));
endmodule