9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire na,nb;
    // TODO: instantiate required gates
    not_gate ng1(a,na);
    not_gate ng2(b,nb);
    and_gate ag1(a,nb,ag1o);
    and_gate ag2(b,na,ag2o);
    or_gate og(ag1o,ag2o,y);
endmodule