9. XOR Gate Using Basic Gates

How do you plan to solve it?

module not_gate ( input a, output y);
assign y = !a;
endmodule 
module and_gate (input a,b, output y);
assign y = a&b;
endmodule 
module or_gate (input a,b, output y);
assign y = a|b;
endmodule 
module xor_gate (input a,b, output y);
wire na, nb,w1,w2;
not_gate n1(.a(a), .y(na));
not_gate n2(.a(b), .y(nb));
and_gate a1(.a(a),.b(nb), .y(w1));
and_gate a2(.a(na),.b(b), .y(w2));
or_gate o1(.a(w1),.b(w2), .y(y));
endmodule