9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    // write code here for or gate
    assign y = a | b;

endmodule

module not_gate(input a, output y);
    // write code here for not gate
    assign y = ~ a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    // TODO: declare intermediate wires
    wire n_a, n_b;
    wire not_a_or_b;
    wire a_or_not_b;
    wire and_1_out;
    wire and_2_out;
    // TODO: instantiate required gates
    not_gate not_A_inst (.a(a), .y(n_a));
    not_gate not_B_inst (.a(b), .y(n_b));
    or_gate or_gate_1 (.a(n_a), .b(b), .y(not_a_or_b));
    not_gate not_gate_1 (.a(not_a_or_b), .y(and_1_out));
    or_gate or_gate_2 (.a(a), .b(n_b), .y(a_or_not_b));
    not_gate not_gate_2 (.a(a_or_not_b), .y(and_2_out));    
    or_gate final_or_gate (.a(and_1_out), .b(and_2_out), .y(y));



 


endmodule