9. XOR Gate Using Basic Gates

How do you plan to solve it?

// ============================================================
// Basic Gates (given)
// ============================================================
module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y=a|b;

endmodule

module not_gate(input a, output y);
    assign y=~a;

endmodule

// ============================================================
// XOR Gate
// ============================================================
module xor_gate (
    input  a, b,
    output y
);
    assign y1=a&~b;
    assign y2=~a&b;
    assign y= y1|y2;

    // TODO: instantiate required gates

endmodule