9. XOR Gate Using Basic Gates

How do you plan to solve it?

// Basic NOT gate
module not_gate(input a, output y);
  assign y = ~a;
endmodule

// Basic AND gate
module and_gate(input a, input b, output y);
  assign y = a & b;
endmodule

// Basic OR gate
module or_gate(input a, input b, output y);
  assign y = a | b;
endmodule

// XOR gate using basic gates
module xor_gate(input a, input b, output y);
  wire nota, notb;
  wire a_and_notb, nota_and_b;

  // Invert inputs
  not_gate u1(.a(a), .y(nota));
  not_gate u2(.a(b), .y(notb));

  // AND operations
  and_gate u3(.a(a), .b(notb), .y(a_and_notb));
  and_gate u4(.a(nota), .b(b), .y(nota_and_b));

  // OR operation
  or_gate u5(.a(a_and_notb), .b(nota_and_b), .y(y));
endmodule