9. XOR Gate Using Basic Gates

How do you plan to solve it?

module and_gate(input a, b, output y);
    assign y = a & b;
endmodule

module or_gate(input a, b, output y);
    assign y = a| b;
endmodule

module not_gate(input a, output y);
  assign y = ~a ;

endmodule


module xor_gate (
    input  a, b,
    output y
);
   wire b_c, a_c;
   not_gate a_com(.y(a_c), .a(a));
   not_gate b_com(.y(b_c), .a(b));
   wire a_bcom, acom_b;
   and_gate and1(.y(a_bcom), .a(a), .b(b_c));
   and_gate and2(.y(acom_b), .a(a_c), .b(b));
   
   or_gate dut(.y(y),.a(a_bcom),.b(acom_b));

endmodule